MC3403P

The circuit, built around a single integrated circuit (U1, an MC3403P quad op amp), three tran-sistors (Q1-Q3), and a few support components, receives its input from the antenna (ANTI). The signal is fed through a high-pass filter, formed by C1, C2, and RI, which eliminates bothersome 60-Hz pickup from any nearby power lines or line cords located in and around buildings and homes.

 From the high-pass filter, the signal is applied to transistor Q1 (which prov'tdes a 10-dB gain for frequencies in the 1- to 2000-MHz range) for amplification. Resistors R2, R3, and R4 form the biasing network for Q1. The amplified signal is then ac coupled, via capacitor C4 and resistor R7's (the sensi-tivity control) wiper, to the inverting input (pin 2) of U1-a. Op amp U1-a is configured as a very high gain amplifier. With no signal input from ANTI, the output of U1-a at pin 1 is near ground potential.

 When a signal from the antenna is applied to the base of Q1, it turns on, producing a negative-go-ing voltage at the cathode of Dl. That voltage is applied to pin 1 of UI-a, which amplifies and inverts the signal, producing a positive-going output at pin 1. Op amps UI-b and UI-c along with CS, RIO through R18, and Q2 are arranged to form a voltage-controlled oscillator fi/CO) that operates over the audio-frequency range. As the output of U1-a increases, the frequency of the VC0 increases. The VCO output, at pin 8 of U1-c, is fed to the input of U1-d, which is configured as a noninverting, unity-gain (buffer) amplifier. The output of U1-d is used to drive Q3, which, in turn, drives the output speaker.